verilator 5.030-1
| Architecture: | x86_64 |
|---|---|
| Repository: | Extra |
| Description: | The fastest free Verilog HDL simulator |
| Upstream URL: | https://www.veripool.org/verilator/ |
| License(s): | LGPL |
| Maintainers: |
Felix Yan Filipe Laíns |
| Package Size: | 5.4 MB |
| Installed Size: | 23.1 MB |
| Last Packager: | Antonio Rojas |
| Build Date: | 2024-11-24 22:14 UTC |
| Signed By: | Antonio Rojas |
| Signature Date: | 2024-11-24 22:17 UTC |
| Last Updated: | 2024-11-24 22:19 UTC |