vtr 8.0.0-2
Architecture: | x86_64 |
---|---|
Repository: | Community |
Description: | Verilog to Routing -- Open Source CAD Flow for FPGA Research |
Upstream URL: | https://verilogtorouting.org |
License(s): | MIT |
Maintainers: |
Filipe Laíns |
Package Size: | 6.2 MB |
Installed Size: | 19.1 MB |
Last Packager: | Filipe Laíns |
Build Date: | 2020-03-31 19:10 UTC |
Signed By: | Filipe Laíns |
Signature Date: | 2020-03-31 19:13 UTC |
Last Updated: | 2020-03-31 19:15 UTC |