verilator 5.006-1
Architecture: | x86_64 |
---|---|
Repository: | Community |
Description: | The fastest free Verilog HDL simulator |
Upstream URL: | https://www.veripool.org/projects/verilator/wiki/Intro |
License(s): | LGPL |
Maintainers: |
Felix Yan Filipe Laíns |
Package Size: | 5.3 MB |
Installed Size: | 25.0 MB |
Last Packager: | Felix Yan |
Build Date: | 2023-01-23 10:09 UTC |
Signed By: | Felix Yan |
Signature Date: | 2023-01-23 10:12 UTC |
Last Updated: | 2023-01-23 11:06 UTC |